#!/bin/bash

##############################################################################
#                   Generate a Makefile for a C project                      #
#                   Gregory KOCH                                             #
##############################################################################

##############################################################################
#       Compiler, compiler option, library, installation directory, ...      #
##############################################################################

# Library name
BIN_NAME="libgps"

# Compiler
CC="gcc"

# System information  - do not edit
SYSTEM=`uname`
CPU_TYPE=`uname -m | tail -c 3`

# Build path - do not edit
PWD="`pwd`"

# Sources directory
SRCDIR=`dirname $0`

# Library and their path (and includes path if needed)
LDFLAGS=""
INC=""

LNFLAGS="-shared"

# Compilation options
CFLAGS="-W -Wall"

# Debug options
DEBUGFLAGS="-g -D DEBUG=1"

# Objects directory
OBJDIR="$PWD/obj/$SYSTEM"
mkdir -p $OBJDIR

# Binary install directory
BINDIR="$PWD/bin/$SYSTEM"
mkdir -p $BINDIR

# Create C files list - do not edit
SOURCES=`find $SRCDIR -depth -type f -name '*.c'`

# Create includes folder list - do not edit
INCLUDE_FILES=`find $SRCDIR -depth -type f -name '*.h'`
INCLUDES=""
LAST_PATH=""
for i in $INCLUDE_FILES
do
    INC_PATH=`dirname $i`
    if [ "$INC_PATH" != "$LAST_PATH" ]; then
	INCLUDES="$INCLUDES -I$INC_PATH"
	LAST_PATH="$INC_PATH"
    fi
done

# Objects - do not edit
OBJECTS=""

##############################################################################
#                           Makefile Creation                                #
##############################################################################

# Erase previous Makefile
echo "" > Makefile

# CFLAGS
echo "CFLAGS=$CFLAGS" >> Makefile
echo "" >> Makefile

# Default rule
echo "default:  $BIN_NAME" >> Makefile
echo "" >> Makefile

# Debug rule
echo "debug:  CFLAGS := \$(CFLAGS) $DEBUGFLAGS" >> Makefile
echo "debug:  default" >> Makefile
echo "" >> Makefile

# Object rules
for i in $SOURCES
do
    echo "processing '$i'"
    FILE=`basename $i .c`
    echo "$OBJDIR/$FILE.o:$i" >> Makefile
    echo -e "\t@echo \"[processing $i...]\"">>Makefile
    echo -e "\t@$CC \$(CFLAGS) $INC $INCLUDES -c -o $OBJDIR/$FILE.o $i" >> Makefile
    echo "" >> Makefile
    OBJECTS="$OBJECTS $OBJDIR/$FILE.o"
done

# Binary rule
echo "$BIN_NAME: $OBJECTS" >> Makefile
echo -e "\t@echo \"[making binary $BIN_NAME ...]\"" >> Makefile
echo -e "\t@$CC $LNFLAGS \$(CFLAGS) $LDFLAGS -o $BINDIR/$BIN_NAME.so  $OBJECTS" >> Makefile
echo "" >> Makefile

# Clean objects rule
echo "clean_obj:" >> Makefile
echo -e "\t@echo \"[cleaning objects ...]\"" >> Makefile
echo -e "\t@rm -f  $OBJDIR/*.o" >> Makefile
echo "" >> Makefile

# Clean rule
echo "clean:" >> Makefile
echo -e "\t@echo \"[cleaning objects and binary file ...]\"" >> Makefile
echo -e "\t@rm -f  $OBJDIR/*.o $BINDIR/$BIN_NAME.so" >> Makefile
echo "" >> Makefile

# Install rule
echo "install:" >> Makefile
echo -e "\t@echo \"[Installing ...]\"" >> Makefile
echo -e "\t@mkdir -p /usr/include/$BIN_NAME" >> Makefile
for i in $INCLUDE_FILES
do
echo -e "\t@cp $i /usr/include/$BIN_NAME/" >> Makefile
done
echo -e "\t@cp $BINDIR/$BIN_NAME.so /usr/lib/" >> Makefile
echo "" >> Makefile

exit 0
